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CISC | RISC | |
---|---|---|
full name | Complex Instruction Set Computer | Reduced Instruction Set Computer |
purpose | Enhance the function of the original instructions, set up more complex new instructions to achieve hardening of software functions | Reduce the instruction type and simplify the instruction function, improve the execution speed of the instruction |
Instruction system | Complex, huge.Computer instruction system is relatively rich, there are special instructions to complete a specific function. Therefore, it is more efficient to deal with special tasks. | Simplicity.Designers focus on the most frequently used instructions and try to make them as simple and efficient as possible. Uncommonly used functions are often completed by combining instructions. Therefore, it may be less efficient to implement special functions on RISC machines. But it can be improved and made up by using flow technology and superscalar technology. |
Instruction number | Usually more than 200 | Usually less than 100 |
Instruction | CISC instructions are unequal in length | RISC instruction is equal length |
Accessible memory instruction | unrestricted | only LOAD/STORE instructions |
The execution time of each instruction | There is a wide variation in execution time between instructions | The vast majority were completed in one cycle |
Frequency of use of various instructions | There is a big difference in frequency between instructions | Instructions are commonly used |
Number of universal registers | less | many |
The execution efficiency of the object code | It is difficult to use optimized compilation to generate efficient object code programs | Using the optimized compiler, the generated code is relatively efficient |
control mode | Most of them are microprogrammed | Most of them are combined logic control |
Instruction pipeline | It can be done in a certain way | Must be implemented |
Memory operation | The machine’s memory operation instruction is many, the operation is direct. | Restrictions on memory operations simplify control. |
Program | Assembly language programming is relatively simple, scientific calculation and complex operation of the program design is relatively easy, high efficiency. | Assembly language programs generally need a larger memory space, the implementation of special functions when the program is complex, not easy to design. |
Interrupt | The machine responds to an interrupt after an instruction has finished executing. | The machine can respond to interrupts at the appropriate place where an instruction is executed. |
CPU | CPU contains abundant circuit units, so it has strong function, large area and large power consumption. | CPU contain fewer cell circuits, thus smaller area and lower power consumption. |
Design cycle | Microprocessor has complex structure and long design cycle. | Microprocessor is simple in structure, compact in layout, short in design cycle, and easy to adopt the latest technology. |
User to use | The microprocessor has complex structure, powerful function and easy to realize special function. | Microprocessor has simple structure, regular instructions, easy to grasp the performance, easy to learn and easy to use. |
Range of application | Machines are more suitable for general purpose machines. | RISC machines are more suitable for specialized machines because the RISC instruction system is determined for a specific application area. |
The applied instruction set (schema) | X86 instruction set (architecture) | MIPS, ARM, RISC-V, POWER-PC [IBM], SPARC, AARCH64 (separated 64-bit execution state based on ARMv8 architecture) instruction set (architecture) |
MIPS | ARM | ARM64 | AArch32 | Power PC | SPARC | x86 | RISC-V | Intel 系列 | AMD 系列 | |
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Architecture | RISC | RISC | RISC | RISC | RISC | RISC | RISC | CISC | CISC | |
Originating in (time, stakeholders) | 1. Established in 1998; 2. Founder: John Leroy Hennessy(pioneer of RISC architecture), Stanford University | 1. Founded in 1985; 2. Founders: ACORN, Professor Sophie Wilson(instruction set development) and Steve Furber(chip design) at the University of California, Berkeley (two companies collaborate to develop ARM1 chip as the backbone of their future personal computers) | The concept was unveiled by Richard Grisenthwaite, Chief Architect and Fellow of ARM, at ARM TechCon 2011, a technology conference in Santa Clara, CA, USA | The concept was unveiled by Richard Grisenthwaite, Chief Architect and Fellow of ARM, at ARM TechCon 2011, a technology conference in Santa Clara, CA, USA | 1.POWER is a microprocessor architecture developed by AIM Alliance formed by Apple, IBM and Motorola in 1991; 2.PowerPC is part of the entire AIM Alliance platform, and by far the only part; 3. Since 2005, Apple has switched its computer products to Intel CPUs; 4. The design was inspired by early RISC architectures (such as IBM 801) and MIPS architectures | In 1987, the result of a collaboration between Sun and TI | Founder: Intel Corporation | 1. Founder: Professor Keste Asanovic (President, RISC-V Foundation), Professor David Pattern (Author of Quantitative Analysis, RISC-V Concept Concept, Turing Award winner), Andrew Turing Waterman(SiFive Lead Engineer, Rocket Processor Author), Yunsup Lee(SiFive CTO, Rocket Processor Author) 2. In 2010, when a research team at UC Berkeley wanted to design a CPU, the research team compared ARM, MIPS, SPARC and X86, etc., and found that there were not only these [instruction set is getting more and more complex], but also a lot of [IP law] problems. Combined with the fact that X86 licenses are difficult to obtain and ARM licenses are expensive, the team decided to design an entirely new instruction set. 3. So, a team of four was formed and the RISC-V instruction set was developed in only three months. 4. The [goal] is a new instruction set that can accommodate processors of all sizes, from microcontrollers to supercomputers | AMD was the first company to produce a 64-bit processor based on the x86 architecture, but due to the competitive relationship, Intel was reluctant to admit the AMD64, and recently launched the Intel64 | AMD was the first company to produce a 64-bit processor based on the x86 architecture, but due to the competitive relationship, Intel was reluctant to admit the AMD64, and recently launched the Intel64 |
characteristics | 1. It was most widely used before 1999; 2. More mature; | 1. Low power consumption and low cost; 2.ARM family accounts for 75% of all 32-bit embedded processors, making it the largest 32-bit architecture in the world; 3. Widely used in embedded systems (low power consumption); 4. Consumer electronics: portable devices (PDAs, mobile devices (dominant), mobile phones, multimedia players, hand-held video games, and computers), computer peripherals (hard drives, desktop routers), and even military devices such as missile computers | 1. ARMV8 architecture is based on 32-bit ARMV7 and retains key technical features such as TrustZone secure execution environment, virtualization, NEON(advanced SIMD), etc. 2.2012 years stable cross The first 64-bit instruction set processor architecture “ARMV8” (fully backward compatible with 32-bit ARM architecture); 3.ARMv8 architecture adds 64-bit operation capability on the basis of 32-bit instruction, including two main execution states: Aarch64 (using ARM Cortex A64 instruction set) and Aarch32 (using ARM Cortex A32 + T32 instruction set). The former introduces a new instruction set “A64” for 64-bit processing, while the latter is designed to be compatible with the existing 32-bit ARM instruction set (easy to port to existing software). 4. The ARMv8 architecture is fully backward compatible with existing 32-bit ARMv7 software, and the 64-bit operating system running on ARMv8 can easily and efficiently support existing 32-bit software | 1. ARMV8 architecture is based on 32-bit ARMV7 and retains key technical features such as TrustZone secure execution environment, virtualization, NEON(advanced SIMD), etc. 2.2012 years stable cross The first 64-bit instruction set processor architecture “ARMV8” (fully backward compatible with 32-bit ARM architecture); 3.ARMv8 architecture adds 64-bit operation capability on the basis of 32-bit instruction, including two main execution states: Aarch64 (using ARM Cortex A64 instruction set) and Aarch32 (using ARM Cortex A32 + T32 instruction set). The former introduces a new instruction set “A64” for 64-bit processing, while the latter is designed to be compatible with the existing 32-bit ARM instruction set (easy to port to existing software). 4. The ARMv8 architecture is fully backward compatible with existing 32-bit ARMv7 software, and the 64-bit operating system running on ARMv8 can easily and efficiently support existing 32-bit software | 1. Strong embedded performance: high performance, low energy loss, low heat dissipation 2. Main application fields: high-end servers, embedded devices, spaceborne computers | Main application fields: spaceborne computer, embedded equipment | 0. Famous teachers (famous brand ————UC Berkeley: advanced, open, reliable); 1. Extremely powerful ecological alliance (non-profit organization RISC-V Foundation): Qualcomm, Nvidia, NXP, Samsung, Microsemi, Micron, ZTE Microelectronics, Huawei Haylight, MediaTek and other semiconductor manufacturers; Google, Ali, IBM and other IT software companies; Western Digital, Seagate and other hard disk data storage giants; Segger, Mentor Graphics, Express Logic, etc. Massachusetts Institute of Technology, Princeton University, Indian Institute of Technology, Institute of Computing Technology, Chinese Academy of Sciences and other world-class research institutes. 2. [Open Source] + [Free], and using the BSD license (Berkeley Software Distribution Protocol, one of the commercial companies’ favorite open source licenses, which allows users to modify and redistribute code, and also allows commercial Software Distribution and sale using or on top of BSD code); 3. The difficulty/cost of learning and developing IC design developers is low. RISC-V is pretty neat compared to the X86 instruction set manual, which is thousands of pages long. | |||
Whether open source | Business closed source | Commercial closed source (IP license model) | Commercial closed source (IP license model) | Commercial closed source (IP license model) | Now open source | Open source | Business closed source | Open source (BSD protocol) |
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