ATMEL AT27C020 数据手册

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BDTIC /ATMELFeatures•Fast Read Access Time – 55 ns•Low-power CMOS Operation–100 µA Max Standby–25 mA Max Active at 5 MHz•JEDEC Standard Packages–32-lead PDIP–32-lead PLCC–32-lead TSOP•5V ± 10% Supply•High-reliability CMOS Technology–2,000V ESD Protection–200 mA Latch-up Immunity•Rapid

Programming Algorithm – 100 µs/Byte (Typical)•CMOS- and TTL-compatible Inputs and Outputs•Integrated Product Identification Code•Industrial and Automotive Temperature Ranges•Green (Pb/Halide-free) Packaging ptionThe AT27C020 is a low-power, high-performance, 2,097,152-bit, one-time program-mable read-only memory (OTP EPROM) organized as 256K by 8 bits. It requires only

one 5V power supply in normal read mode operation. Any byte can be accessed

in less than 55 ns, eliminating the need for speed-reducing WAIT states on high-performance microprocessor read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current

is typically less than 10 µ AT27C020 is available in a choice of industry-standard JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC and TSOP packages. All devices fea-ture two-line control (CE, OE) to give designers the flexibility to prevent bus

256K bytes storage capability, the AT27C020 allows firmware to be stored reli-ably and to be accessed by the system without the delays of mass storage ’s AT27C020 has additional features to ensure high quality and efficient produc-tion use. The Rapid

Programming Algorithm reduces the time required to program the

part and guarantees reliable programming. Programming time is typically only

100 µs/byte. The Integrated Product Identification Code electronically identifies the

device and manufacturer. This feature is used by industry-standard programming

equipment to select the proper programming algorithms and voltages.2-megabit

(256K x 8)

OTP EPROMAT27C020 0570G–EPROM–12/07

ConfigurationsPin NameA0 - A17O0 - O7CEOEPGMFunctionAddressesOutputsChip EnableOutput EnableProgram Strobe2.132-lead PLCC Top View2.332-lead TSOP (Type 1) Top ViewA12A15A16VPPVCCPGMA172.232-lead PDIP Top ViewVPPA16A15A12A7A6A5A4A3A2A1A0O0O1O2GND0102GND1617181920A7A6A5A4A3A2A1A0O524232221A14A13A8A9A11OEA10CE07A11A9A8A13A14A17PGMVCCVPPA16A15A12A7A6A5A4323191817OEA10CEGND0201O0A0A1A2A34323423222120191817VCCPGMA17A14A13A8A9A11OEA10CE 2AT27C020

0570G–EPROM–12/07

ConsiderationsSwitching between active and standby conditions via the Chip Enable pin may produce tran-sient voltage excursions. Unless accommodated by the system design, these transients may

exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This

capacitor should be connected between the VCC and Ground terminals of the device, as close

to the device as possible. Additionally, to stabilize the supply-voltage level on printed circuit

boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again

connected between the VCC and Ground terminals. This capacitor should be positioned as

close as possible to the point where the power supply is connected to the te Maximum Ratings*Temperature -55°C to +125°.-65°C to +150°CVoltage on Any Pin with

Respect -2.0V to +7.0V(1)Voltage on A9 with

Respect to Ground ......................................-2.0V to +14.0V(1)VPP Supply Voltage with

Respect -2.0V to +14.0V(1)Note:m voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is

VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20 ns.*NOTICE:Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect device

reliability. 30570G–EPROM–12/07

ing ModesMode/PinReadOutput DisableStandbyRapid Program(2)PGM VerifyPGM InhibitProduct Identification(4)Notes:1.X can be VIL or to Programming = 12.0 ± identifier bytes may be selected. All Ai inputs are held low (VIL) except A9, which is set to VH and A0, which is toggled

low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code VIHVILVILVIHVILOEVILVIHXVIHVILXVILPGMX(1)XXVILVIHXXAiAiXXAiAiXA9 = VH(3)A0 = VIH or VILA1 - A17 = VILVPPXXXVPPVPPVPPXOutputsDOUTHigh-ZHigh-ZDINDOUTHigh-ZIdentification and AC Operating Conditions for Read OperationAT27C020-55Operating Temperature (Case)VCC Power .5V ± 10%-40°C - 85°C-90-40°C - 85°C-40°C - 125°C5V ± 10% and Operating Characteristics for Read OperationSymbolILIILOIPP(2)ISBICCVILVIHVOLVOHNotes:ParameterInput Load CurrentOutput Leakage CurrentVPP(1) Read/Standby CurrentVCC(1) Standby CurrentVCC Active CurrentInput Low VoltageInput High VoltageOutput Low VoltageOutput High VoltageIOL

= 2.1 mAIOH = -400 µA2.4ConditionVIN = 0V to VCC

(Com., Ind.)VOUT = 0V to VCC

(Com., Ind.)VPP

= VCCISB1 (CMOS), CE = VCC ± 0.3VISB2 (TTL), CE = 2.0 to VCC

+ 0.5Vf = 5 MHz, IOUT = 0 mA, CE = VIL-0.62.0MinMax±1.0±5.0±101001.0250.8VCC + 0.50.4UnitsµAµAµAµ must be applied simultaneously or before VPP

, and removed simultaneously or after VPP

. may be connected directly to VCC except during programming. The supply current would then be the sum of ICC

and IPP

. 4AT27C020

0570G–EPROM–12/07

Characteristics for Read OperationAT27C020-55SymboltACC(3)tCE(2)tOE(2)(3)tDF(4)(5)tOHParameterAddress to Output DelayCE to Output DelayOE to Output DelayOE or CE High to Output Float,

Whichever Occurred FirstOutput Hold from Address, CE or OE,

Whichever Occurred First7ConditionCE = OE = VILOE = VILCE = Waveforms for Read Operation(1)Notes: measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise may be delayed up to tCE - tOE after the falling edge of CE without impact on may be delayed up to tACC - tOE after the address is valid without impact on parameter is only sampled and is not 100% float is defined as the point when data is no longer driven. 50570G–EPROM–12/07

Test Waveforms and Measurement LevelsFor -55 devices only:3.0VACDRIVINGLEVELS0.0V1.5VACMEASUREMENTLEVELtR, tF

< 5 ns (10% to 90%)For -90 devices only:tR, tF

< 20 ns (10% to 90%) Test LoadNote:CL = 100 pF including jig capacitance except -55 devices, where CL = 30 pF.

Capacitance

f = 1 MHz, T = 25°C(1)SymbolCINCOUTNote:Typ48Max812UnitspFpFConditionsVIN = 0VVOUT = l values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 6AT27C020

0570G–EPROM–12/07

mming Waveforms

(1)Notes: Input Timing reference is 0.8V for VIL and 2.0V for and tDFP

are characteristics of the device but must be accommodated by the programming the AT27C020, a 0.1 µF capacitor is required across VPP and ground to suppress voltage transients. 70570G–EPROM–12/07

Programming CharacteristicsTA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25VLimitsSymbolILIVILVIHVOLVOHICC2IPP2VIDParameterInput Load CurrentInput Low LevelInput High LevelOutput Low VoltageOutput High VoltageVCC Supply Current (Program and Verify)VPP Supply CurrentA9 Product Identification VoltageCE = PGM = VIL11.5IOL = 2.1 mAIOH = -400 µA2.4402012.5Test ConditionsVIN = VIL, VIH-0.62.0MinMax±100.8VCC

+ 1.00.4Unitsµ Programming CharacteristicsTA = 25 ± 5°C, VCC = 6.5 ± 0.25V,VPP = 13.0 ± 0.25VLimitsSymboltAStCEStOEStDStAHtDHtDFPtVPStVCStPWtOEtPRTNotes:ParameterAddress Setup TimeCE Setup TimeOE Setup TimeData Setup TimeAddress Hold TimeData Hold TimeOE High to Output Float Delay(2)VPP Setup TimeVCC

Setup TimePGM Program Pulse Width(3)Data Valid from OEVPP Pulse Rise Time During

ProgrammingOutput Timing Reference Level:0.8V to 2.0VInput Timing Reference Level:0.8V to 2.0VInput Rise and Fall Times:(10% to 90%) 20 nsInput Pulse Levels:0.45V to 2.4VTest Condition

(1)Min2222050130MaxUnitsµsµsµsµsµsµsnsµsµsµ

must be applied simultaneously or before VPP

and removed simultaneously or after VPP

. parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven –

see timing m Pulse width tolerance is 100 µs ± 5%.’s AT27C020 Integrated Product Identification CodePinsCodesManufacturer DeviceTypeA001O701O600O500O410O310O211O111O000Hex Data1E86 8AT27C020

0570G–EPROM–12/07

rogramming Algorithm

A 100 µs PGM pulse width is used to program. The address is set to the first location. VCC is

raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs

PGM pulse without verification. Then a verification/reprogramming loop is executed for each

address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are

applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been

applied, the part is considered failed. After the byte verifies properly, the next address is

selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes

are read again and compared with the original data to determine if the device passes or fails.0570G–EPROM–12/07 9

ng Information19.1Standard PackageICC (mA)Active25Standby0.1Ordering CodeAT27C020-55JIAT27C020-55PIAT27C020-55TIAT27C020-90JIAT27C020-90PIAT27C020-90TIAT27C020-90JAAT27C020-90PAPackage32J32P632T32J32P632T32J32P6Operation RangeIndustrial(-40°C to 85°C)Industrial(-40°C to 85°C)Automotive(-40°C to 125°C)tACC(ns)5590250.1250.1Note:Not recommended for new designs. Use Green package option.19.2Green Package (Pb/Halide-free)ICC (mA)Active25Standby0.1Ordering CodeAT27C020-55JUAT27C020-55PUAT27C020-55TUAT27C020-90JUAT27C020-90PUAT27C020-90TUPackage32J32P632T32J32P632TOperation RangeIndustrial(-40°C to 85°C)Industrial(-40°C to 85°C)tACC(ns)5590250.1Package Type32J32P632T32-lead, Plastic J-leaded Chip Carrier (PLCC)32-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)32-lead, Plastic Thin Small Outline Package (TSOP) 10AT27C020

0570G–EPROM–12/07

ing Information20.132J – PLCC1.14(0.045) X 45˚PIN NO. 1IDENTIFIER1.14(0.045) X 45˚0.318(0.0125)0.191(0.0075)BE1EB1E2 eD1D AA2A10.51(0.020)MAX45˚ MAX (3X)COMMON DIMENSIONS(Unit of Measure = mm)SYMBOLD2MIN3.1751.524 0.38112.31911.3549.90614.85913.89412.4710.6600.330NOM–––––––––––1.270 TYPMAX3.5562.413–12.57311.50610.92215.11314.04613.4870.813 0.533NOTEAA1A2DD1D2

Note 2Notes: package conforms to JEDEC reference MS-016, Variation AE.

ions D1 and E1 do not include mold ble protrusion is .010"(0.254 mm) per side. Dimension D1and E1 include mold mismatch and are measured at the extremematerial condition at the upper or lower parting line.3. Lead coplanarity is 0.004" (0.102 mm) 1 E2BB1eNote 210/04/01 2325 Orchard Parkway San Jose, CA 95131TITLE32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)

DRAWING NO.32JREV.

B 110570G–EPROM–12/07

20.232P6 – PDIPDPIN1E1ASEATING PLANELB1eE0º ~ 15º

REFBA1CeBCOMMON DIMENSIONS(Unit of Measure = mm)SYMBOLAA1DEE1BMIN–0.38141.78315.24013.4620.3561.0413.0480.20315.494NOM––––––––––2.540 TYPMAX4.826–42.29115.87513.9700.5591.6513.5560.38117.526Note 1Note 1NOTE Note:ions D and E1 do not include mold Flash or Flash or Protrusion shall not exceed 0.25 mm (0.010").

B1LCeBe09/28/01 2325 Orchard Parkway San Jose, CA 95131TITLE32P6, 32-lead (0.600"/15.24 mm Wide) Plastic Dual

Inline Package (PDIP)

DRAWING NO.32P6REV.

B 12AT27C020

0570G–EPROM–12/07

AT27C02020.332T – TSOPPIN 10º ~ 8º

cPin 1 IdentifierD1DLebA2L1EASEATING PLANEGAGE PLANEA1SYMBOLAA1A2Notes: package conforms to JEDEC reference MO-142, Variation BD.

ions D1 and E do not include mold protrusion. Allowable

protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.3. Lead coplanarity is 0.10 mm 1EL L1bceCOMMON DIMENSIONS(Unit of Measure = mm)MIN–0.050.9519.8018.307.900.50NOM––1.0020.0018.408.000.600.25 BASIC0.170.100.22–0.50 BASIC0.27 0.21MAX1.200.151.0520.2018.508.100.70Note 2Note 2

NOTE10/18/01 2325 Orchard Parkway San Jose, CA 95131TITLE32T, 32-lead (8 x 20 mm Package) Plastic Thin Small Outline

Package, Type I (TSOP)DRAWING NO.32TREV.

B 130570G–EPROM–12/07

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