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该职位来源于猎聘ResponsibilitiesWork with the global design teams to do complex SOC verification for digital/analog mixed large/Complex SoC design.block level verification based on System Verilog &UVM methodology for the complex new IP design.Responsible for verification plan quality, verification result/design target cross-check, test case development to have better coverage and verification quality. Co-work with functional verification team to ensure the complex SoC verification functional coverage and qualityRequirementsBachelor or master’s degree in Microelectronics, Electronics, Electronic Engineering, Computer Science or relevant disciplinesGood knowledge and experience in C/C++/Verilog/System Verilog/UVM programming languages, familiar with IC simulation&debug flow and tools,testbench build, unix/linux environment, tcl/perl script etc.Good Knowledge of computer architecture, especially ARM CPU(Cortex A/M series), bus protocols(APB/AHB/AXI), verification experience of ARM-based SoC is a plus

更新于 2021-05-21

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